Can Offset Be A Register In Assembly
Assembly - Registers
Processor operations mostly involve processing information. This data can be stored in retentiveness and accessed from thereon. However, reading data from and storing data into memory slows downwards the processor, as it involves complicated processes of sending the information request across the control coach and into the retentiveness storage unit and getting the data through the same channel.
To speed upwards the processor operations, the processor includes some internal memory storage locations, called registers.
The registers store data elements for processing without having to access the memory. A limited number of registers are built into the processor chip.
Processor Registers
There are ten 32-bit and six 16-bit processor registers in IA-32 architecture. The registers are grouped into three categories −
- General registers,
- Control registers, and
- Segment registers.
The general registers are further divided into the following groups −
- Data registers,
- Pointer registers, and
- Index registers.
Information Registers
Four 32-bit data registers are used for arithmetic, logical, and other operations. These 32-chip registers can be used in three ways −
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As complete 32-bit data registers: EAX, EBX, ECX, EDX.
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Lower halves of the 32-chip registers can be used as four 16-bit data registers: AX, BX, CX and DX.
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Lower and higher halves of the above-mentioned iv 16-fleck registers tin can be used as eight 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.
Some of these data registers have specific use in arithmetical operations.
AX is the primary accumulator; it is used in input/output and most arithmetic instructions. For example, in multiplication operation, one operand is stored in EAX or AX or AL register according to the size of the operand.
BX is known as the base register, every bit information technology could be used in indexed addressing.
CX is known as the count register, equally the ECX, CX registers store the loop count in iterative operations.
DX is known as the data register. It is also used in input/output operations. Information technology is also used with AX annals along with DX for multiply and dissever operations involving big values.
Arrow Registers
The pointer registers are 32-bit EIP, ESP, and EBP registers and respective 16-scrap right portions IP, SP, and BP. There are three categories of pointer registers −
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Instruction Pointer (IP) − The 16-bit IP register stores the commencement address of the next instruction to exist executed. IP in association with the CS annals (as CS:IP) gives the complete address of the electric current instruction in the lawmaking segment.
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Stack Pointer (SP) − The sixteen-bit SP register provides the start value within the program stack. SP in association with the SS register (SS:SP) refers to be current position of data or accost inside the plan stack.
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Base Pointer (BP) − The 16-fleck BP register mainly helps in referencing the parameter variables passed to a subroutine. The address in SS annals is combined with the showtime in BP to get the location of the parameter. BP can also be combined with DI and SI equally base annals for special addressing.
Index Registers
The 32-scrap alphabetize registers, ESI and EDI, and their xvi-fleck rightmost portions. SI and DI, are used for indexed addressing and sometimes used in add-on and subtraction. In that location are two sets of alphabetize pointers −
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Source Index (SI) − It is used as source index for string operations.
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Destination Index (DI) − It is used equally destination index for string operations.
Control Registers
The 32-fleck instruction pointer register and the 32-bit flags register combined are considered as the command registers.
Many instructions involve comparisons and mathematical calculations and change the status of the flags and some other conditional instructions examination the value of these status flags to have the control menstruation to other location.
The common flag bits are:
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Overflow Flag (OF) − It indicates the overflow of a high-order bit (leftmost bit) of information afterward a signed arithmetic operation.
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Direction Flag (DF) − It determines left or correct direction for moving or comparing string data. When the DF value is 0, the string operation takes left-to-right direction and when the value is gear up to 1, the string operation takes right-to-left management.
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Interrupt Flag (IF) − It determines whether the external interrupts similar keyboard entry, etc., are to be ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when set to one.
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Trap Flag (TF) − It allows setting the operation of the processor in single-step mode. The DEBUG program we used sets the trap flag, so we could step through the execution i education at a time.
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Sign Flag (SF) − It shows the sign of the result of an arithmetic operation. This flag is prepare according to the sign of a data particular following the arithmetic operation. The sign is indicated by the loftier-society of leftmost scrap. A positive result clears the value of SF to 0 and negative result sets it to 1.
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Goose egg Flag (ZF) − It indicates the upshot of an arithmetic or comparing operation. A nonzero consequence clears the zero flag to 0, and a zero event sets it to 1.
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Auxiliary Deport Flag (AF) − It contains the carry from flake 3 to bit four following an arithmetic operation; used for specialized arithmetic. The AF is set when a ane-byte arithmetic functioning causes a carry from bit 3 into bit 4.
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Parity Flag (PF) − Information technology indicates the full number of 1-bits in the upshot obtained from an arithmetic operation. An even number of 1-$.25 clears the parity flag to 0 and an odd number of ane-bits sets the parity flag to 1.
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Bear Flag (CF) − It contains the conduct of 0 or ane from a high-lodge bit (leftmost) after an arithmetic operation. It also stores the contents of last fleck of a shift or rotate operation.
The post-obit table indicates the position of flag bits in the 16-chip Flags annals:
| Flag: | O | D | I | T | S | Z | A | P | C | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Bit no: | 15 | fourteen | 13 | 12 | 11 | ten | nine | 8 | 7 | 6 | 5 | 4 | 3 | ii | 1 | 0 |
Segment Registers
Segments are specific areas defined in a program for containing data, code and stack. There are 3 main segments −
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Code Segment − It contains all the instructions to be executed. A 16-bit Code Segment register or CS register stores the starting address of the code segment.
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Data Segment − It contains data, constants and piece of work areas. A 16-chip Data Segment register or DS register stores the starting address of the data segment.
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Stack Segment − Information technology contains data and return addresses of procedures or subroutines. Information technology is implemented as a 'stack' information construction. The Stack Segment register or SS register stores the starting accost of the stack.
Apart from the DS, CS and SS registers, there are other extra segment registers - ES (extra segment), FS and GS, which provide additional segments for storing information.
In assembly programming, a program needs to admission the retentivity locations. All retentiveness locations within a segment are relative to the starting address of the segment. A segment begins in an accost evenly divisible by 16 or hexadecimal 10. So, the rightmost hex digit in all such retentivity addresses is 0, which is not generally stored in the segment registers.
The segment registers stores the starting addresses of a segment. To go the verbal location of data or education inside a segment, an first value (or displacement) is required. To reference any memory location in a segment, the processor combines the segment address in the segment register with the offset value of the location.
Instance
Wait at the following simple program to understand the use of registers in assembly programming. This plan displays 9 stars on the screen along with a simple message −
section .text global _start ;must be declared for linker (gcc) _start: ;tell linker entry point mov edx,len ;bulletin length mov ecx,msg ;message to write mov ebx,i ;file descriptor (stdout) mov eax,4 ;system telephone call number (sys_write) int 0x80 ;call kernel mov edx,ix ;bulletin length mov ecx,s2 ;message to write mov ebx,1 ;file descriptor (stdout) mov eax,4 ;organization telephone call number (sys_write) int 0x80 ;call kernel mov eax,i ;system telephone call number (sys_exit) int 0x80 ;call kernel section .data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg ;length of message s2 times ix db '*'
When the above code is compiled and executed, it produces the following result −
Displaying 9 stars *********
Can Offset Be A Register In Assembly,
Source: https://www.tutorialspoint.com/assembly_programming/assembly_registers.htm
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