How Many Registers Do I Have?

Assembly - Registers

Processor operations generally involve processing data. This information can be stored in retentivity and accessed from thereon. However, reading data from and storing data into memory slows downward the processor, as information technology involves complicated processes of sending the data asking across the control bus and into the retentiveness storage unit and getting the information through the same channel.

To speed upward the processor operations, the processor includes some internal memory storage locations, called registers.

The registers store data elements for processing without having to admission the retentivity. A limited number of registers are built into the processor scrap.

Processor Registers

In that location are ten 32-bit and six sixteen-scrap processor registers in IA-32 compages. The registers are grouped into three categories −

General registers,
Control registers, and
Segment registers.

The full general registers are further divided into the following groups −

Data registers,
Pointer registers, and
Alphabetize registers.

Data Registers

Four 32-bit data registers are used for arithmetic, logical, and other operations. These 32-bit registers can be used in three ways −

As consummate 32-bit data registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-chip registers can be used as four 16-bit data registers: AX, BX, CX and DX.
Lower and college halves of the above-mentioned four 16-bit registers can exist used as eight 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers accept specific use in arithmetical operations.

AX is the primary accumulator; it is used in input/output and most arithmetics instructions. For example, in multiplication functioning, ane operand is stored in EAX or AX or AL annals according to the size of the operand.

BX is known as the base register, every bit it could be used in indexed addressing.

CX is known equally the count annals, every bit the ECX, CX registers shop the loop count in iterative operations.

DX is known as the data register. It is besides used in input/output operations. It is also used with AX register along with DX for multiply and carve up operations involving large values.

Pointer Registers

The pointer registers are 32-chip EIP, ESP, and EBP registers and respective sixteen-bit right portions IP, SP, and BP. There are three categories of arrow registers −

Education Pointer (IP) − The sixteen-chip IP register stores the offset accost of the next instruction to be executed. IP in association with the CS annals (equally CS:IP) gives the complete address of the current instruction in the code segment.
Stack Pointer (SP) − The sixteen-bit SP register provides the kickoff value within the program stack. SP in association with the SS register (SS:SP) refers to be electric current position of data or address inside the plan stack.
Base Pointer (BP) − The sixteen-bit BP annals mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to get the location of the parameter. BP tin besides be combined with DI and SI as base register for special addressing.

Pointer Registers

Index Registers

The 32-scrap alphabetize registers, ESI and EDI, and their 16-flake rightmost portions. SI and DI, are used for indexed addressing and sometimes used in improver and subtraction. In that location are two sets of index pointers −

Source Index (SI) − It is used equally source index for cord operations.
Destination Alphabetize (DI) − It is used as destination index for string operations.

Index Registers

Command Registers

The 32-bit instruction arrow register and the 32-bit flags register combined are considered as the control registers.

Many instructions involve comparisons and mathematical calculations and alter the condition of the flags and some other conditional instructions test the value of these status flags to take the control catamenia to other location.

The common flag $.25 are:

Overflow Flag (OF) − Information technology indicates the overflow of a high-order scrap (leftmost bit) of data after a signed arithmetic operation.
Direction Flag (DF) − It determines left or correct management for moving or comparison cord information. When the DF value is 0, the string operation takes left-to-correct management and when the value is set to 1, the cord functioning takes right-to-left direction.
Interrupt Flag (IF) − It determines whether the external interrupts like keyboard entry, etc., are to exist ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when set to 1.
Trap Flag (TF) − It allows setting the functioning of the processor in single-step mode. The DEBUG program we used sets the trap flag, and so we could stride through the execution one didactics at a fourth dimension.
Sign Flag (SF) − It shows the sign of the result of an arithmetics performance. This flag is ready co-ordinate to the sign of a data item following the arithmetics functioning. The sign is indicated by the high-guild of leftmost bit. A positive result clears the value of SF to 0 and negative result sets information technology to 1.
Zero Flag (ZF) − It indicates the result of an arithmetic or comparing functioning. A nonzero result clears the zero flag to 0, and a zilch result sets it to 1.
Auxiliary Carry Flag (AF) − It contains the deport from scrap 3 to fleck 4 following an arithmetic operation; used for specialized arithmetic. The AF is gear up when a ane-byte arithmetic operation causes a bear from bit iii into flake four.
Parity Flag (PF) − It indicates the total number of 1-bits in the consequence obtained from an arithmetic performance. An fifty-fifty number of 1-bits clears the parity flag to 0 and an odd number of 1-bits sets the parity flag to i.
Deport Flag (CF) − Information technology contains the bear of 0 or one from a high-order bit (leftmost) afterwards an arithmetic performance. It too stores the contents of last bit of a shift or rotate operation.

The following table indicates the position of flag bits in the xvi-bit Flags register:

Flag:					O	D	I	T	S	Z		A		P		C
Chip no:	15	14	13	12	11	10	nine	viii	vii	6	5	4	3	2	1	0

Segment Registers

Segments are specific areas divers in a program for containing data, lawmaking and stack. There are three main segments −

Code Segment − It contains all the instructions to be executed. A xvi-bit Code Segment register or CS annals stores the starting address of the code segment.
Data Segment − Information technology contains data, constants and work areas. A xvi-bit Data Segment register or DS annals stores the starting address of the data segment.
Stack Segment − It contains data and return addresses of procedures or subroutines. It is implemented as a 'stack' information structure. The Stack Segment register or SS annals stores the starting accost of the stack.

Apart from the DS, CS and SS registers, at that place are other extra segment registers - ES (extra segment), FS and GS, which provide boosted segments for storing information.

In assembly programming, a plan needs to access the memory locations. All memory locations within a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by 16 or hexadecimal 10. So, the rightmost hex digit in all such retention addresses is 0, which is not generally stored in the segment registers.

The segment registers stores the starting addresses of a segment. To become the verbal location of data or pedagogy within a segment, an commencement value (or displacement) is required. To reference whatever memory location in a segment, the processor combines the segment accost in the segment annals with the offset value of the location.

Example

Look at the following simple program to understand the use of registers in assembly programming. This plan displays 9 stars on the screen along with a simple message −

section	.text    global _start	 ;must exist alleged for linker (gcc) 	 _start:	         ;tell linker entry bespeak    mov	edx,len  ;bulletin length    mov	ecx,msg  ;bulletin to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,4    ;system call number (sys_write)    int	0x80     ;phone call kernel 	    mov	edx,ix    ;message length    mov	ecx,s2   ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,four    ;organisation call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,1    ;arrangement call number (sys_exit)    int	0x80     ;call kernel 	 section	.data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg  ;length of message s2 times 9 db '*'

When the in a higher place code is compiled and executed, it produces the following consequence −

Displaying ix stars *********